ATTARC - Advanced TTA for Redstone Computing

My next step for this project is to develop an emulator of some sort to speed software development and debugging. Minecraft computers are very slow, even ATTARC, and I can produce working software faster with a system that will run it faster. For example, in Minecraft it takes ATTARC about 5 minutes to calculate the Fibonacci sequence to 16 bits. Reminds me of the bad old days when I would run "make" and get a cup of coffee. My first thought was to write a software virtual machine. ATTARC is a trivial architecture so that should not be too difficult. But as I sat down to start coding I realized that, while I could produce a simple emulator that runs the code as fast as possible and NOT simulating timing hazards, it would need to be cycle-accurate to really validate software, and it would take a lot more work to make it "cycle-accurate". Nothing I can't handle, but it does bump up the complexity, So then I got to wondering if there might be an existing simulation...

UPDATE: Dec 1, 2024 There is a bug in the configurable-delay model; it re-extends pulses that are already extended. It's fine as long as you don't put more than one >= 2-tick delay-repeater in series. I have created an improved model here  https://attarc-redstone.blogspot.com/2024/12/an-improved-model-of-minecraft-repeater.html

 This video demonstrates the ATTARC CPU calculating the Fibonacci sequence using 16 bit words. You'll probably want to speed it up. Source code for assembly program (assembler & linker & ROM programmer implemented in JavaScript) // calculate 16 bit Fibonacci sequence import { ZERO , NULL , INVERT , ISZERO , ADD1_C , R0JC , R1 , R2 , R3 , R4 , R5 , R6 , R7SC , PC , LOG_A , LOG_B , ADD1_A , ADD1_B , XOR , AND , OR , ADD1 , RNG , Program } from "../asm" ; const P = new Program (); export default P ; P . clear ( ADD1_A ) . clear ( ADD1_B ) . clear ( ADD1_C ) . clear ( R0JC ) // 1L . clear ( R1 ) // 1L . clear ( R2 ) // 1H . move ( 1 , R3 ) // 2L . clear ( R4 ) // 2H . add ( R1 , R3 , R1 ) . label ( 'loop' ) . addc ( R2 , R4 , R2 ) . jumpcnz ( 'halt' ) . add ( R1 , R3 , R3 ) . addc ( R2 , R4 , R4 ) . jumpcnz ( 'halt' ) . add ( R1 , R3 , R1 ) . addc ( R2 , R4 , R2 ) ...

One day I got bored of playing Minecraft survival, and I decided to build a redstone computer. ATTARC 1.0 Given my background as a computer engineer and the many helpful Redstoners in the community, this seemed like a fairly achievable goal. Still, I had never previously designed a CPU from scratch; I'm old-school but not quite that old. But I was confident that I had the requisite knowledge and experience, so I began the design process. I started by asking myself this question: "What does a computer fundamentally DO?" The answer in my head: "It shuffles bits around". So I decided I could just build a bus, some registers, attach some peripherals, decoders, a program counter, and some ROM, and it would be a brilliantly simple but powerful and flexible computer. Then I thought to myself, "Somebody else must have already thought of this." Sure enough, somebody had, and it even had it's own wikipedia page: https://en.wikipedia.org/wiki/Transport_trigge...